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 CAT5111 100-Tap Digitally Programmable Potentiometer (DPPTM) with Buffered Wiper
FEATURES
100-position linear taper potentiometer Non-volatile EEPROM wiper storage; buffered wiper Low power CMOS technology Single supply operation: 2.5V-6.0V Increment up/down serial interface Resistance values: 10k, 50k and 100k Available in PDIP, SOIC, TSSOP and MSOP packages
DESCRIPTION
The CAT5111 is a single digitally programmable potentiometer (DPPTM) designed as a electronic replacement for mechanical potentiometers. Ideal for automated adjustments on high volume production lines, they are also well suited for applications where equipment requiring periodic adjustment is either difficult to access or located in a hazardous or remote environment. The CAT5111 contains a 100-tap series resistor array connected between two terminals RH and RL. An up/down counter and decoder that are controlled by three input pins, determines which tap is connected to the wiper, RWB. The CAT5111 wiper is buffered by an op amp that operates rail to rail. The wiper setting, stored in non-volatile memory, is not lost when the device is powered down and is automatically recalled when power is returned. The wiper can be adjusted to test new system values without effecting the stored setting. Wiper-control of the CAT5111 is accomplished with three input control pins, CS, U/D, and INC. The INC input increments the wiper in the direction which is determined by the logic state of the U/D input. The CS input is used to select the device and also store the wiper position prior to power down. The digitally programmable potentiometer can be used as a buffered voltage divider. For applications where the potentiometer is used as a 2-terminal variable resistor, please refer to the CAT5113. The buffered wiper of the CAT5111 is not compatible with that application.
APPLICATIONS
Automated product calibration Remote control adjustments Offset, gain and zero control Tamper-proof calibrations Contrast, brightness and volume controls Motor controls and feedback systems Programmable analog functions
For Ordering Information details, see page 10.
FUNCTIONAL DIAGRAM
RH VCC RH U/D INC CS Power On Recall Control and Memory
+
RWB
+ -
RL RL Electronic Potentiometer Implementation RWB
-
GND
(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
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Doc. No. MD-2008 Rev. P
CAT5111
PIN CONFIGURATION
PDIP 8-Lead (L) SOIC 8 Lead (V) MSOP 8 Lead (Z)
INC 1 U/D 2 RH 3 GND 4 8 VCC 7 CS 6 RL 5 RWB
PIN DESCRIPTIONS
Name Function TSSOP 8 Lead (Y)
CS 1 VCC 2 INC 3 U/D 4 8 RL 7 RWB 6 GND 5 RH
INC U/D RH RWB RL CS VCC
Increment Control Up/Down Control Potentiometer High Terminal Buffered Wiper Terminal Potentiometer Low Terminal Chip Select Supply Voltage
CAT
CAT
GND Ground
PIN DESCRIPTION
INC: Increment Control Input The INC input (on the falling edge) moves the wiper in the up or down direction determined by the condition of the U/D input. U/D: Up/Down Control Input The U/D input controls the direction of the wiper movement. When in a high state and CS is low, any will cause the wiper to high-to-low transition on INC move one increment toward the RH terminal. When in a low state and CS is low, any high-to-low transition will cause the wiper to move one increment on INC towards the RL terminal. RH: High End Potentiometer Terminal RH is the high end terminal of the potentiometer. It is not required that this terminal be connected to a potential greater than the RL terminal. Voltage applied to the RH terminal cannot exceed the supply voltage, VCC or go below ground, GND. RWB: Wiper Potentiometer Terminal (Buffered) RWB is the buffered wiper terminal of the poten- tiometer. Its position on the resistor array is controlled by the control inputs, INC, U/D and CS. RL: Low End Potentiometer Terminal RL is the low end terminal of the potentiometer. It is not required that this terminal be connected to a potential less than the RH terminal. Voltage applied to the RL terminal cannot exceed the supply voltage, VCC or go below ground, GND. RL and RH are electrically interchangeable. CS: Chip Select The chip select input is used to activate the control input of the CAT5111 and is active low. When in a high state, activity on the INC and U/D inputs will not affect or change the position of the wiper.
DEVICE OPERATION
The CAT5111 operates like a digitally controlled potentiometer with RH and RL equivalent to the high and low terminals and RWB equivalent to the mecha- nical potentiometer's wiper. There are 100 available tap positions including the resistor end points, RH and RL. There are 99 resistor elements connected in series between the RH and RL terminals. The wiper terminal is connected to one of the 100 taps and controlled by three inputs, INC, U/D and CS. These inputs control a seven-bit up/down counter whose output is decoded to select the wiper position. The selected wiper position can be stored in nonvolatile memory using the INC and CS inputs. With CS set LOW the CAT5111 is selected and will respond to the U/D and INC inputs. HIGH to LOW transitions on INC wil increment or decrement the wiper (depending on the state of the U/D input and seven-bit counter). The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. When the CAT5111 is powered-down, the last stored wiper counter position is maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the counter is set to the value stored. With INC set low, the CAT5111 may be de-selected and powered down without storing the current wiper position in nonvolatile memory. This allows the system to always power up to a preset value stored in nonvolatile memory.
Doc. No. MD-2008 Rev. P
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(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
CAT5111
OPERATION MODES INC High to Low High to Low High Low X CS Low Low Low to High Low to High High U/D High Low X X X Operation Wiper toward RH Wiper toward RL Store Wiper Position No Store, Return to Standby Standby
CL RL Potentiometer Equivalent Circuit CH RWI RWB CW RH
ABSOLUTE MAXIMUM RATINGS(1) Parameters Supply Voltage VCC to GND Inputs CS to GND INC to GND U/D to GND RH to GND RL to GND RWB to GND Symbol VZAP(2) ILTH(2) (3) TDR NEND Ratings -0.5 to +7V -0.5 to VCC +0.5 -0.5 to VCC +0.5 -0.5 to VCC +0.5 -0.5 to VCC +0.5 -0.5 to VCC +0.5 -0.5 to VCC +0.5 Units V V V V V V V Parameters Operating Ambient Temperature Commercial (`C' or Blank suffix) Industrial (`I' suffix) Junction Temperature Storage Temperature Lead Soldering (10s max) Ratings 0 to 70 -40 to +85 +150 -65 to 150 +300 Units C C C C C
RELIABILITY CHARACTERISTICS Parameter ESD Susceptibility Latch-Up Data Retention Endurance Test Method MIL-STD-883, Test Method 3015 JEDEC Standard 17 MIL-STD-883, Test Method 1008 MIL-STD-883, Test Method 1003 Min 2000 100 100 1,000,000 Typ Max Units V mA Years Stores
DC ELECTRICAL CHARACTERISTICS VCC = +2.5V to +6V unless otherwise specified Power Supply Symbol VCC ICC1 ICC2 ISB1(3) Parameter Operating Voltage Range Supply Current (Increment) Supply Current (Write) Supply Current (Standby) VCC = 6V, f = 1MHz, IW = 0 VCC = 6V, f = 250kHz, IW = 0 Programming, VCC = 6V VCC = 3V CS = VCC - 0.3V U/D, INC = VCC - 0.3V or GND Conditions Min 2.5 - - - - - Typ - - - - - 75 Max 6 200 100 1000 500 150 Units V A A A A A
Notes: (1) Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. (2) (3) (4) (5) This parameter is tested initially and after a design or process change that affects the parameter. Latch-up protection is provided for stresses up to 100mA on address and data pins from -1V to VCC + 1V IW = source or sink These parameters are periodically sampled and are not 100% tested.
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Doc. No. MD-2008 Rev. P
CAT5111
Logic Inputs Symbol IIH IIL VIH1 VIL1 VIH2 VIL2 Parameter Input Leakage Current Input Leakage Current TTL High Level Input Voltage TTL Low Level Input Voltage CMOS High Level Input Voltage CMOS Low Level Input Voltage Conditions VIN = VCC VIN = 0V 4.5V VCC 5.5V 2.5V VCC 6V Min - - 2 0 VCC x 0.7 -0.3 Typ - - - - - - Max 10 -10 VCC 0.8 VCC + 0.3 VCC x 0.2 Units A A V V V V
Potentiometer Characteristics Symbol RPOT Parameter Potentiometer Resistance Pot. Resistance Tolerance VRH VRL INL DNL ROUT IOUT TCRPOT TCRATIO RISO fc VWB(SWING) Voltage on RH pin Voltage on RL pin Resolution Integral Linearity Error Differential Linearity Error Buffer Output Resistance Buffer Output Current TC of Pot Resistance Ratiometric TC Isolation Resistance Frequency Response Output Voltage Range Passive Attenuator, 10k IOUT 100A, VCC = 5V 0.01VCC IW 2A IW 2A 0.05VCC VWB 0.95VCC, VCC = 5V 0.05VCC VWB 0.95VCC, VCC = 5V 300 TBD TBD 8/8/25 1.7 0.99VCC 0 0 1 0.5 0.25 1 0.5 1 3 Conditions -10 Device -50 Device -00 Device Min Typ 10 50 100 20 VCC VCC % V V % LSB LSB mA ppm/C ppm/C pF MHz k Max Units
CRH/CRL/CRW Potentiometer Capacitances
Doc. No. MD-2008 Rev. P
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(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
CAT5111
AC CONDITIONS OF TEST VCC Range Input Pulse Levels Input Rise and Fall Times Input Reference Levels 2.5V VCC 6V 0.2VCC to 0.7VCC 10ns 0.5VCC
AC OPERATING CHARACTERISTICS VCC = +2.5V to +6.0V, VH = VCC, VL = 0V, unless otherwise specified Symbol tCI tDI tID tIL tIH tIC tCPH tCPH tIW tCYC tR, tF tPU
(2) (2)
Parameter CS to INC Setup U/D to INC Setup U/D to INC Hold INC LOW Period INC HIGH Period INC Inactive to CS Inactive CS Deselect Time (NO STORE) CS Deselect Time (STORE) INC to VOUT Change INC Cycle Time INC Input Rise and Fall Time Power-up to Wiper Stable Store Cycle
Min 100 50 100 250 250 1 100 10 - 1 - - -
Typ (1) - - - - - - - - 1 - - - 5
Max - - - - - - - - 5 - 500 1 10
Units ns ns ns ns ns s ns ms s s s ms ms
tWR
A.C. TIMING
CS (store) tCPH 90% 10% tDI U /D tID tF tR 90%
tCI INC
tIL
tCYC
tIH
tIC
tIW RWB
MI(3)
Notes: (1) (2) (3) Typical values are for TA = 25C and nominal supply voltage. This parameter is periodically sampled and not 100% tested. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
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Doc. No. MD-2008 Rev. P
CAT5111
PACKAGE OUTLINES
PDIP 8-LEAD (300MIL) (L)
E1
E D
A2
A
c
A1
L
e b2 b
eB
SYMBOL A A1 A2 b b2 c D E E1 e eB L
MIN 0.38 3.05 0.36 1.14 0.21 9.02 7.62 6.09 7.87 2.92
NOM
MAX 4.57 3.81 0.56 1.77 0.35 10.16 8.25 7.11 9.65 3.81
0.46 0.26 7.87 6.35 2.54 BSC
For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf.
Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC Standard MS001. (3) Dimensioning and tolerancing per ANSI Y14.5M-1982
Doc. No. MD-2008 Rev. P
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(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
CAT5111
SOIC 8-LEAD NARROW BODY (150MIL) (V)
E1 E
D A 1 e b A1
h x 45 C
L
SYMBOL A1 A b C D E E1 e h L 1
MIN 0.10 1.35 0.33 0.19 4.80 5.80 3.80
NOM
MAX 0.25 1.75 0.51 0.25 5.00 6.20 4.00
1.27 BSC 0.25 0.40 0 0.50 1.27 8
For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf.
Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC Specification MS-012.
(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
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Doc. No. MD-2008 Rev. P
CAT5111
8-LEAD TSSOP (Y)
D
8 5
SEE DETAIL A
c E E1
E/2
1
4
GAGE PLANE
PIN #1 IDENT. 0.25 1 A2 L SEATING PLANE SEE DETAIL A A
e b
A1
SYMBOL A A1 A2 b c D E E1 e L 1
MIN 0.05 0.80 0.19 0.09 2.90 6.30 4.30 0.50 0.00
NOM
MAX 1.20 0.15 1.05 0.30 0.20 3.10 6.50 4.50 0.75 8.00
0.90
3.00 6.4 4.40 0.65 BSC 0.60
For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf.
Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC Standard MO-153
Doc. No. MD-2008 Rev. P
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(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
CAT5111
8-LEAD MSOP (Z)
E1
E
e
e
e
D GAUGE PLANE A2 A
c
L2
b A1 L L1
SYMBOL A A1 A2 b c D E E1 e L L1 L2
MIN 0.05 0.75 0.28 2.90 4.80 2.90 0.35
NOM 0.10 0.85 0.33 3.00 4.90 3.00 0.65 BSC 0.45
MAX 1.1 0.15 0.95 0.38 3.10 5.00 3.10 0.55
0
6
For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf.
Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC Specification MS-187. (3) Stand off height/coplanarity are considered as special characteristics.
(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
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Doc. No. MD-2008 Rev. P
CAT5111
EXAMPLE OF ORDERING INFORMATION
Prefix CAT Device # 5111 Suffix V I -10 - G(4) T3
Optional Company ID Product Number 5111
Temperature Range I = Industrial (-40C to 85C) Resistance -10: 10k ohms -50: 50k ohms -00: 100k ohms
Tape & Reel T: Tape & Reel 3: 3000/Reel Lead Finish Blank: Matte-Tin G:NiPdAu
L: V: Y: Z:
Package PDIP SOIC TSSOP MSOP
Notes: (1) (2) (3) (4) All packages are RoHS compliant. Standard lead finish is NiPdAu. This device used in the above example is a CAT5111VI-10-GT3 (SOIC, Industrial Temperature, 10k, NiPdAu, Tape & Reel). For Matte-Tin finish, contact factory.
ORDERING PART NUMBER
CAT5111LI-10-G CAT5111LI-50-G CAT5111LI-00-G CAT5111VI-10-G CAT5111VI-50-G CAT5111VI-00-G CAT5111YI-10-G CAT5111YI-50-G CAT5111YI-00-G CAT5111ZI-10-G CAT5111ZI-50-G CAT5111ZI-00-G
Doc. No. MD-2008 Rev. P
10
(c) 2007 Catalyst Semiconductor, Inc. Characteristics subject to change without notice
REVISION HISTORY
Date 3/10/2004 3/29/2004 4/12/2004 06/01/2007 Rev. M N O P Reason Updated Potentiometer Parameters Changed Green Package marking for SOIC from W to V Updated Reel Ordering Information Updated Example of Ordering Information Added Package Outline Added MD- in front of Document No.
Copyrights, Trademarks and Patents Trademarks and registered trademarks of Catalyst Semiconductor include each of the following: Beyond MemoryTM, DPPTM, EZDimTM, LDDTM, LDDTM, MiniPotTM and Quad-ModeTM Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES. Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur. Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale. Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete.
Catalyst Semiconductor, Inc. Corporate Headquarters 2975 Stender Way Santa Clara, CA 95054 Phone: 408.542.1000 Fax: 408.542.1200 www.catsemi.com
Document No: MD-2008 Revision: P Issue date: 06/01/07


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